(circuit design) (LSSD) A kind of scan design which uses separate system and scan clocks to distinguish between normal and test mode. Latches are used in pairs, each has a normal data input, data output and clock for system operation. For test operation, the two latches form a master/slave pair with one scan input, one scan output and non-overlapping scan clocks A and B which are held low during system operation but cause the scan data to be latched when pulsed high during scan.
____ | | Sin —-|S | A ——|> | | Q|—+————— Q1 D1 —–|D | | CLK1 —|> | | |____| | ____ | | | +—|S | B ——————-|> | | Q|—— Q2 / SOut D2 ——————|D | CLK2 —————-|> | |____|
In a single latch LSSD configuration, the second latch is used only for scan operation. Allowing it to be use as a second system latch reduces the silicon overhead.
- Level two cache
- Level with someone
Speak frankly and openly to someone, as in His companions advised him to level with the customs inspector. [ ; early 1900s ] Also see: on the level
[lee-vuh n] /ˈli vən/ noun 1. Loch, a lake in E Scotland: ruins of a castle in which Mary Queen of Scots was imprisoned. /ˈliːvən/ noun Loch Leven 1. a lake in E central Scotland: one of the shallowest of Scottish lochs, with seven islands, on one of which Mary, Queen of Scots was imprisoned […]
[lev-er, lee-ver] /ˈlɛv ər, ˈli vər/ noun 1. Mechanics. a rigid bar that pivots about one point and that is used to move an object at a second point by a force applied at a third. Compare (def 4b). 2. a means or agency of persuading or of achieving an end: Saying that the chairman […]