Scan register
(circuit design) A digital logic circuit which can act either as a flip-flop or as a serial shift register and which is used to form a scan path.
The most common design is a multiplexed flip-flop:
___ ____ normal in –| \ | | | |——|D Q|—- normal/scan output scan in —-|___/ mux | | | | | test mode —-+ +—-|> | flip-flop | |____| clk —————+
The addition of a multiplexor (mux) to each flip-flop’s input allows operation in either normal or test mode. The output of each flip-flop goes to the normal functional logic as well as to the scan input of the next multiplexor in the scan path.
The other common design is level-sensitive scan design (LSSD).
(1995-02-14)
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